1. Technical Field
The present invention relates in general to a system and method for a configurable interface controller. More particularly, the present invention relates to a system and method for dynamically assigning external interface pins to a particular input-output controller.
2. Description of the Related Art
A circuit designer attempts to maximize silicon utilization by balancing the number of external interface pins that the circuit includes with the number of gates that the circuit requires. A circuit design layout has an input-output (I/O) ring that is located around the perimeter of the layout whereby the I/O ring includes a pad that corresponds to each external interface pin.
In some circuit layouts, the layout is considered “pad limited” in that the I/O ring dictates the size of the layout because of an over abundance of input and output pads included in the I/O ring. For example, the number of pads in a particular layout may make the dimensions of the I/O ring perimeter 10 mm on each side (e.g. 10 mm×10 mm), yet the circuit logic itself encompasses only 5 mm×5 mm of the layout. In this example, 75 sq. mm (100 sq. mm−25 sq. mm) of the layout space is unused which equates to excess silicon manufacturing costs.
Circuit designers scrutinize which interfaces to include in a particular circuit design. A circuit designer understands the impracticality of including an over abundance of interfaces in a circuit design. In order to determine which interfaces to include in a circuit design, the circuit designer attempts to identify interfaces that a customer may wish to use when connecting peripherals to the device. For example, a circuit designer may know that customers may wish to communicate with peripheral devices using USB ports. In this example, the circuit designer determines the most practical number of USB interfaces to include in the design.
A circuit design for a processor includes input-output controllers (IOC) that manage data exchange between the processor and a particular fixed interface. For example, a processor may include three high speed fixed interfaces whereby the processor includes three corresponding IOC's, each IOC being dedicated to a particular high-speed interface.
A challenge found, however, is that processors with fixed interfaces are limited in which peripheral devices may be connected. For example, if a processor has two input interfaces with four input pins each, a peripheral device with four output pins should be connected to one of the processor's input interface in order to best utilize the input interface.
Furthermore, a processor with a fixed interface is not able to assign interface pins to a first IOC if the interface pins are assigned to a second IOC. Using the example described above, if a peripheral device with two output pins is connected to the processor's first interface that corresponds to a first IOC, the processor is not able to re-assign its two unused input pins to a different input interface that corresponds to a second IOC. In this example, the processor's input interfaces are not best utilized because a peripheral device is connected to the processor that does not have a matching interface.
What is needed, therefore, is a system and method for dynamically assigning interface pins to a particular input-output controller in order to maximize interface pin utilization.